IT TECH HOMEPAGE::

Computer Terms & Definitions:

AGP Accelerated Graphics Port – a 66 MHz (doubled to 133 MHz in practice) bus used in combination with the standard 32-bit 33MHz PCI bus for graphics adapters to receive data from main memory faster.

Northbridge – In the chipset community, this refers to the major bus controller circuitry, like the memory, cache, and PCI controllers.  The north bridge may have more than one discrete chip.  The entire chipset is named after the numbers on the primary or largest north bridge chip.  e.g. "FW82439HX" designates the Intel 430HX PCIset.

Southbridge – In chipset lingo, this refers to the peripheral and non-essential controllers, like EIDE and serial port controllers.  The south bridge usually has only one discrete chip, and has the benefit of being interchangeable on many different chipsets, for example the SiS 5513 and the Intel PIIX.

BEDO Burst Enhanced Data-Out RAM – EDO, only a bit faster.

SDRAM Synchronous Dynamic RAM – memory that operates synchronously to the memory bus.  SDRAM is normally rated at 8, 10, or 12 ns, while standard DRAM is rated at 60, 70, or 80 ns.  In practice, SDRAM is packaged in the relatively new 3.3 volt 168-pin unbuffered DIMM modules. SDRAM is slowly replacing EDO and FPM.

DIMM Dual In-Line Memory Module – usually refers to the 168-pin 64-bit/72-bit/80-bit modules found in many Socket 7 and Slot 1 motherboards.  A 168-pin DIMM may be SDRAM, EDO, FPM, or BEDO RAM.  As far as I know, DIMM's are always 3.3 V devices and cannot be mixed with 5 V SIMM's.

FPM Fast Page Mode – the type of RAM found on most 386, 486, and P5 motherboards.  EDO is gradually replacing FPM.  Most FPM RAM is rated at 60, 70, 80, or 100 ns, and is most often packaged in 5 V 30-pin or 72-pin SIMM's.

ECC Error-Correcting Code – a designation for memory or buses that perform constant checking of data integrity.  Memory buses may use ECC to automatically correct single-bit errors in real-time and detect two-bit errors.  Note that a 2-bit error will usually hang the system.  For main memory, your chipset or your memory must support ECC before you gain the benefits of it. ECC memory is very expensive and is normally found only on high-end servers.  (Some people have tried to correct this assumption, however it is still accurate.)

Slot 1 – Intel's patented (proprietary) motherboard connector for the Pentium II's Single Edge Connector (SEC) module.  The Pentium II CPU and heatsink fit into the Slot 1 using rails mounted on plastic inserts.  Slot 1 to Socket 8 adapters are made to allow for Pentium Pro processors to fit into a Slot 1.

Socket 8 – Intel's patented (proprietary) motherboard connector for the Pentium Pro CPU.  The Socket 8 is a zero-insertion force (ZIF) design that makes CPU installation quick and easy, unlike the Slot 1 design which requires a manual and a half-dozen pieces of plastic.

Socket 7 – The de facto industry-standard design originated by Intel that can be used for any P54C or P55C processor, including the AMD K5 and K6, the Intel Pentium and Pentium MMX, the IDT C6, and the Cyrix/IBM 6x86, 6x86L, and 6x86MX processors.  The Socket 7 is a ZIF design like the Socket 8, and it supersedes the older Socket 5/6's that earlier P54C (single-voltage) processors used.

Socket 4 – The P5's ZIF socket, used only for the 5 volt Pentium.  Sockets prior to the Socket 4 were less well-defined and were used on 486-style motherboards.

SMP Symmetric Multi-Processing – a method that allows more than one microprocessor to share the load of CPU requests. The Intel Pentium Pro natively supports four CPU's.  The Intel Pentium and Pentium II support only two CPU's.  With the aid of specialized circuitry, systems can be built with many more than just four CPU's, although this sometimes requires an asymmetric (front-end, back-end) system.

The Intel Multi-Processor Standard (MPS) is the specification used by chipset makers and software developers for SMP systems.  Intel's MPS allows the owner of an Intel SMP system to buy an off-the-shelf software product such as Linux, Microsoft NT, SCO MPX, FreeBSD, Sun Solaris, Novell NetWare, or IBM OS/2 by simply installing the software's multi-processing HAL for Intel microprocessors.

USB Universal Serial Bus – to (mis)use a familiar acronym, USB is a "peripheral connection interface" for external devices. To describe it is also to imply that it is known in the industry as "vaporware."  There just aren't many devices that use USB for it to be a serious technology yet.  Its speed is a staggering 24 MHz (12 Mb/sec), making a run for the i-link, IEEE-1394 (Apple's FireWire) market.  USB is supposed to be what you'll connect joysticks, keyboards, modems, scanners, mice, and anything else you use today that needs a slow SCSI or RS-232 interface.  Sure, RS-232 was the hot product of the 1980's, but hey - it still works fine for my modem.  With as slow as it is adopting USB, many people believe that the IEEE-1394 spec will blow the doors off USB (USB maxes out at a puny 12 Mbps compared to 400 Mbps for i-link), leaving USB to a fate somehow reminiscent of the 80487.  Others see USB used for low-to-medium bandwidth products, supplementing the high-end i-link products that may soon run at speeds up to 1 Gbps.

BIOS Basic Input/Output System – the software stored in ROM that is executed first during a system's boot.  The BIOS performs a power-on-self-test (POST) which verifies vital component functions like memory, CPU, cache, DMA, keyboard, A20 address gate, video, floppy, and hard disks.  This software may be stored on a EEPROM so that the user may "flash" or write to the ROM.  Not to be confused with CMOS.  A system's BIOS was what actually introduced me to the idea of reverse-engineering.  Now, the famous Compaq BIOS that won court approval paved the way for Compaq to be the first manufacturer of a 386 computer, beating IBM in their own game.  Back then, clones were declared illegal if you merely copied the IBM BIOS and didn't pay a licensing fee.  Compaq had to find a bunch of virgin BIOS-code writers who had never seen IBM's PC BIOS.  The virgin engineers received carefully-worded instructions from "dirty" engineers who had seen the BIOS code.  All of this was scrutinized as part of a landmark court decision regarding cloning, reverse-engineering, and NDA's.

This revolution opened up the third-party unlicensed BIOS-writing industry as Phoenix, AMI, and others began selling and licensing BIOS code to clone PC builders around the world.  The story of the BIOS is what defined the IBM clone industry of the 1980's and 90's.

CMOS Complementary Metal Oxide Semiconductor – yes, even I'm impressed that I know what it stands for.  Although there are quite a few ways to describe CMOS (you can always get into a TTL/CMOS logic debate or a discussion on the properties of doped silicon), the CMOS on a motherboard is not the generic, all-encompassing term you may be familiar with. Rather, CMOS is merely the small 64-byte memory circuit that holds vital configuration data used by the BIOS every time the system is booted.  The CMOS is what the Setup program writes to whenever you update your hard disk or memory settings.  The motherboard's CMOS is sometimes in two parts – one for the password, the other for the setup info.  Many motherboards allow you to clear setup CMOS and/or password CMOS separately if you wish.  Since the CMOS circuit must have constant power to it to keep its contents stored, you can clear it by moving the jumper provided for this function.  Most motherboards have a mercury or alkaline battery to maintain the RTC and the CMOS circuits supplied with power.  Note that CMOS actually refers to the process employed to manufacture the circuit, and it is more properly called NVRAM (non-volatile RAM) to distinguish it from other CMOS circuits.

ROM read-only memory – On a motherboard, this stores the BIOS code, and is most often a 64 KB or 128 KB EEPROM.  Types include EPROM (erasable, programmable ROM), which uses UV light to erase and a ROM burner to program, and EEPROM (electrically erasable, programmable ROM), known as Flash ROM, which can be written and erased while in-circuit.  The ROM is usually socketed with 28 pins and has a reflective sticker on it to cover the EPROM's window.  Shining UV light through this window will erase the EPROM's memory so it can be reprogrammed.

RTC Real-Time Clock – This device is not only self-explanatory, it's the most predictable of components on the motherboard.  It receives power from a small battery on the motherboard.

PnP Plug ‘n Play – the specification that allows devices to be automatically detected and configured by the system software, both the BIOS and the OS.  Microsoft Windows 95 is the only major OS with native PnP capabilities.

ACPI Advanced Configuration and Power Interface – a power management API that goes beyond what APM's suspend and doze modes would do.  It was introduced by the Intel 430TX chipset as part of its PC97 compliance.

PCI Rev. 2.1 Concurrent PCI – the PCI specification used in all current Intel chipsets, including the 430VX, 430HX, 430TX, and 440FX.

COAST Cache-on-a-stick – cache module in a DIMM package found on Socket 7 motherboards.  There are at least two different versions of COAST, each related to the chipset of the motherboard.  COAST seems to be a short-lived technology with its niche in 1996.  Caches made prior to or after this time mainly use good old-fashioned SRAM soldered to the motherboard.

PC97 – This was an initiative planned and agreed upon by Intel (for the chipsets), Microsoft (for the operating system), and Toshiba (for the mobile PC industry) to improve power management, increase conformity for the notebook computer, and to specify the technologies that computer manufacturers should comply with for maximum compatibility.  This initiative includes ACPI, Ultra DMA, Concurrent PCI, and SDRAM. See also PC98.

Reference Material Digital Audio/Video

General Computer Reference

MTSU Recording Industry Class Reference

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